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ZL40518 3 Channel Laser Diode Driver
Data Sheet Features
* * * * * * * * * * * * * Current-controlled Output Current source Output Current per Channel to 250 mA Total Output Current to 300 mA Rise Time 1.0 ns, Fall Time 1.1 ns On-chip RF Oscillator External Resistor Control of Oscillator Swing and Frequency 200 to 500 MHz Oscillator Range 100 mA Maximum Oscillator Swing Single +5 V Power Supply (10%) Low-power Consumption Common Enable, Disable Input TTL/CMOS control signals Small SS016 Package ZL40518LDG SSO16 0C to +70C Tape and Reel Ordering Information
October 2004
Applications
* * DVD R/RW CD R/RW
CH_R INR /ENR CH_2 IN2 /EN2
VCC
IOUT
CH_3 IN3 /EN3
RF_freq
RF RS
RF_mag
GND
OSCEN
PWR_UP
Figure 1 - Functional Block Diagram 1
Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.
ZL40518
Data Sheet
INR IN2 GND RF IN3 /ENR /EN2 /EN3
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC_IN VCC IOUT GND RS PWR_UP OSCEN VCC
Figure 2 - Pinout of 16 Pin SSO16 Package (Top View)
Description
The ZL40518 is a laser diode driver for high speed operation of a grounded laser diode. The driver consists of 3 controllable channels: a switchable, low noise, read channel and two switchable write channels. Write current pulses are enabled with the application of a low signal on the /EN pins. A summed output of all channels is available at the IOUT pin. Each channel can contribute up to 250 mA to the total output current of up to 300 mA. A total read channel gain of 100 and write channels 2 and 3 with a gain of 250 and 150 respectively are provided between each reference current input and output. Laser mode hopping noise during read mode can be reduced by the use of an on-chip RF oscillator. The oscillator frequency and swing can be set by two external resistors. The oscillator is enabled by a high signal on the OSCEN pin and the entire device can be switched off by the application of a low signal on the PWR_UP pin.
Application Notes
Read and Write Channel Operation The read channel is activated by applying a 'High' signal to the PWR_UP pin and applying a 'low' signal to /ENR. In this mode, the fast write channels can be enabled by applying a 'Low signal to the respective pair of write enable pins (/EN2) or (/EN3). The output currents of the three channels are summed together and output as a composite signal at IOUT. Voltage control of the channel reference inputs (INR, IN2 and IN3) can be achieved quite easily using an external resistor Rref in series with the reference channel input to convert a given reference potential Vref to an input current, Iin:
I in =
Vref Rref + Rin ,
where Rin is the input impedance of the respective reference channel. On-Chip RF Oscillator An on-chip RF oscillator is enabled if OSCEN = 'High', and its output signal is added to the current output.The oscillator amplitude is set by an external resistor from RS to GND. Its frequency is set by an external resistor RF to GND. The oscillator signal is summed with the programmed Write and Read levels before amplification to the output. The oscillator signal has zero DC level and +I_pk to -I_pk signal swing. Consequently, if the programmed DC level from the Write and Read Channels is less than the PK level programmed for the Oscillator, the combined
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Zarlink Semiconductor Inc.
ZL40518
Data Sheet
signal will be clipped on the negative cycle of the signal. This will increase the harmonic content of the output signal and reduce the pk to pk amplitude output. Thermal Considerations Package thermal resistance is 40 C/W under the EIA/JESD51-3 compliant PCB test board condition. Users should ensure that the junction temperature does not exceed 150C. Thermal resistance from junction to case and to ambient is very much dependent on how the IC is mounted onto the board, on the PCB layout and on any heat extraction arrangements. Power consumption and system ambient operating temperature limits should be noted and careful thermal gradient calculations undertaken to ensure that the junction temperature never exceeds 150C. Electrical and Optical Pulse Response
Lfix = 3nH Iout En
2p 15 500
Lint K Lint C_bypass
Vcc _A K Lfix = 3nH OutA
C_out
17p
ZL40518 Model Lint=5nH , BW = 460MHz, Rd=7, Q=j20/(15+7) =0.9 Lint=5nH, BW = 460MHz, Rd=3, Q=j20/(15+3) = 1.11 Lint=7nH, BW = 411MHz, Rd=7, Q=j18/(15+7) = 0.8 Lint=7nH, BW = 411MHz, Rd=3, Q=j18/(15+3) = 1.0
Cd
Rd Vd
Figure 3 - Pulse Response Model Figure 3 illustrates a simplified model of the typical ZL40518 and the application. The ZL40518 consist of an ideal switched current source and an equivalent model of the ZL40518 output stage. The Electrical Model for the Laser Diode is a Voltage source Vd (V_on) in series with the On Resistance Rd all in parallel with the Junction Capacitance Cd. This simplified model approximately represents the Laser Diode Electrical load when operated beyond the Laser Threshold. To a first approximation, the Optical output is proportional to the current flow in the Resistor Rd. The Laser Diode and the ZL40518 are connected together by interconnect tracks with the return current passing through the supply decoupling bypass capacitor between ground and output Vcc. The ZL40518 will typically switch the programmed output current in 400 ps and can be approximated to an ideal switch with a propagation delay of Iout_on (1.2 nS). The electrical pulse response parameters, Trise, Tfall, Overshoot and Undershoot are determined by the combined electrical network as illustrated in Figure 3. For example, the Rise Time and Fall time for large current steps can be slew rate limited by the combined interconnect and fixed interconnect inductance. The Fixed Inductance represents that associated with packaging and minimum interconnect distance . The Interconnect Inductance is that associated with the additional tracking between Laser Diode and the ZL40518 to accommodate application physical limitations. For example, if a pulse of 260 mA amplitude (40 mA to 300 mA) is to be switched in a time of 1 ns with the Vd = 1.6 V, then the maximum volt drop across the interconnect inductance is approximately 3.5 V (maximum Vpin for 300 mA output) - 1.6 V (Vdiode) = 1.9 V. Consequently, L*di/dt < 1.9 V. Hence , L < 1.9/ (0.26A/1ns) = 7.3 nH.
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Zarlink Semiconductor Inc.
ZL40518
Data Sheet
Small current step size Rise and Fall time will be determined by the Bandwidth of the combined network. This is dominated by the Interconnect Inductance and the output Capacitance. Similarly, the overshoot and undershoot will be determined by the Q of the network. This is a function of the Source Impedance from the ZL40518, the Interconnect inductance and the Load impedance of the Laser Diode. Figure 3 includes example simplified estimates of the Q and BW of the combined Laser Diode, ZL40518 and interconnect network for two different interconnect inductance values (5 nH & 7 nH) and two different Diode On resistance (3 Ohm & 7 Ohm) . This simple analysis illustrates the change in BW and Q of the network depending on these parameters. This in Turn effects the Rise Time and Fall time and the Overshoot and Undershoot performance achieved in the application. Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40518 Evaluation Board The specified performance in the table are results based on the electrical measurements and simulations across full process corners using the Zarlink Evaluation Board using a 6.8 Ohm resistive load to ground. The track interconnect between ZL40518 and the 6.8 Ohm Resistor is 15 mm long and uses a 2 mm wide track on single sided FR4 board. The return path is via two 2 mm wide tracks spaced 0.25 mm either side of the track between output and the 6.8 ohm resistor. The combined forward and return path forms a co planar transmission line with a characteristic impedance of approximately 120 ohms. The tight coupled return paths carrying the return current reduce the effective series inductance (Leff) which can be approximated to:Leff = 2 * Lint * (1 - K) + 2 * Lfix * (1 - K). The ZLE40518 board has two positions for the Laser Diode at two different distances. (15 and 30 mm). The measured value of Leff is 7 nH. The estimated value of Leff = 2 * 8 (1 - 0.5) = 8 nH. The actual pulse response achieved in an application is thus dependent on the application. Application Layer Guide Lines Minimize Interconnect Inductance by:a. Using Short Interconnect Distance b. Use wide interconnect tracks c. Keep the return path tightly coupled to the forward path
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Zarlink Semiconductor Inc.
ZL40518
ZLE40518 Interconnect
Data Sheet
Figure 4 - ZLE40518 Application Board Electrical Interconnect
Application Diagram
VCC INR IN2 ANALOG INPUTS GND RF IN3 /ENR /EN2 /EN3 VCC_IN
1 2 3 4 5 4 7 8 16 15 14 13 12 11 10 9
VCC IOUT GND RS PWR_UP OSCEN VCC
LASER DIODE
DIGITAL INPUTS
Figure 5 - Evaluation Board Circuit
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Zarlink Semiconductor Inc.
ZL40518
Pin List
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin name INR IN2 GND RF IN3 /ENR /EN2 /EN3 VCC OSCEN PWR_UP RS GND IOUT VCC VCC_IN Type Analog Analog Supply Analog Analog Digital Digital Digital Supply Digital Digital Analog Supply Analog Supply Supply Function Read Channel Input Current Channel 2 Input Current Ground External Resistor to ground to set Oscillator Frequency Channel 3 Input Current Digital control of Read Channel (active low) Digital control of Channel 2 (active low) Digital control of Channel 3 (active low) +5 V supply Enables RF oscillator (active high) Device Power Up (active high) External Resistor to ground to set Oscillator Amplitude Ground Output current for laser diode +5 V supply +5 V supply
Data Sheet
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Zarlink Semiconductor Inc.
ZL40518
Absolute Maximum Ratings
Data Sheet
Permanent damage may occur to any device stressed beyond the "Absolute Maximum Ratings". Operation at or beyond this stress rating is not implied for this or following sections of this specification. Device reliability can be affected by prolonged exposure to absolute maximum ratings.
Parameters Supply voltage Input voltage at INR, IN2, IN3 Input voltage at PWR_UP, /ENR, /EN2, /EN3, OSCEN Output voltage Power dissipation Junction temperature Storage temperature range
Note 1: Note 2: R thJA 115C/W, Tamb = 70 C R thJA 115C/W, Tamb = 25C
Symbol Vcc VIN1 VIN2 VOUT PMax TJ TStg
Value -0.5 to +6.0 -0.5 to +2.0 -0.5 to Vcc + 0.5 -0.5 to Vcc - 1 0.71 to 12 150 -65 to +125
Unit V V V V W C C
Operating Range Characteristic Supply voltage range Input current Symbol Vcc IINR IIN2 IIN3 RF RS Tamb Units 4.5 to 5.5 <2.5 <1.0 <1.7 >3 >2 0 to +70 Unit V mA k k C
External resistor to GND to set oscillator frequency External resistor to GND to set oscillator swing Operating temperature range Package Thermal Resistance Parameters Junction ambient
Note 1:
Symbol RthJA
Value 1151
Unit K/W
Measured with a multilayer test board (JEDEC standard).
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ZL40518
(/ENR = low), OSCEN = Low, unless otherwise specified.
Data Sheet
Electrical Characteristics - Vcc = 5 V, Tamb = 25C, PWR_UP = High, Ch2 and Ch3 disabled (/EN2 = /EN3 = high), Read enabled Test Conditions
Parameters Power Supply Supply current, power down Supply current, read mode, oscillator disabled Supply current, read mode, oscillator enabled
Pin.
Symbol
Min.
Typ.
Max.
Unit
Type*
PWR_UP = Low, /EN2 = /EN3 = Low IINR =500 A, IIN2 = 200 A, IIN3 = 333 A IINR =500 A, IIN2 = 200 A, IIN3 = 333 A, OSCEN = High, RS = 7.5 k, RF = 7.5 k IINR =500 A, IIN2 = 200 A, IIN3 = 333 A, /EN2 = /EN3 = Low IINR = IIN2 = IIN3 = 0 A
9, 15, 16 9, 15, 16 9, 15, 16
ICCPD2
0.4
mA
A
ICCR1
86
mA
A
ICCR2
90
mA
A
Supply current, write mode
9, 15, 16
ICCW
180
mA
A
Supply current, input off Digital Inputs /ENR, /EN2, /EN3 low voltage /ENR, /EN2, /EN3 high voltage PWR_UP Low Voltage PWR_UP High Voltage OSCEN low voltage OSCEN high voltage Current at Digital Inputs /ENR, /EN2, /EN3 low current /ENR, /EN2, /EN3 high current PWR_UP Low Current PWR_UP High Current OSCEN low current OSCEN high current
9, 15, 16 6, 7, 8 6, 7, 8 11 11 10 10
ICCoff
15
mA
A
VNELO VNEHI VENLO VENHI VEOLO VEOHI INELO INEHI IENLO IENHI IEOLO IEOHI -100 -150 3.0 -300 2.7 1.9
1.2
V V
A A A A A A C C C C C C
0.5 0.5
V V V V A
/EN = 0 V /EN = 5 V PWR_UP = 0 V PWR_UP = 5 V OSCEN = 0 V OSCEN = 5 V
6, 7, 8 6, 7, 8 11 11 10 10
800
A A
100 800
A A A
* A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
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ZL40518
Electrical Characteristics - Vcc = 5 V, Tamb = 25C, PWR_UP = High, unless otherwise specified. Parameters Output IOUT Total output current Output current per channel IOUT series resistance Best fit current gain INR Best fit current gain IN2 Best fit current gain IN3 Best fit current offset Output current linearity IIN input impedance IIN input impedance IIN input impedance EN threshold Output off current 1 Output off current 2 Output is sourcing Output is sourcing Total ROUT to VCC rail Channel R1 Channel 21 Channel 31 Any channel 1 Any channel 1 RIN,INR is to GND RIN,IN2 is to GND RIN,IN3 is to GND Temperature stabilised PWR_UP = Low /EN2 = /EN3 = High, IINR = 0, IIN2 = 200 A, IIN3 = 333 A /EN2 = /EN3 = Low, IINR = IIN2 = IIN3 = 0 A IOUT = 80 mA, 40 mA read + 40 mA write, VCC = 5 V +/10% IOUT = 40 mA, OSCEN = Low 14 14 14 14 14 14 14 14 1 2 5 6, 7, 8 14 14 IOUT IOUTR ROUT GAINR GAIN2 GAIN3 IOS ILIN RIN,INR RIN,IN2 RIN,IN3 VTH IOFF1 IOFF2 -3 500 1250 750 1.6 1 1 90 225 135 250 2 100 250 150 2.6 +3 130 325 195 350 mA mA mA/ mA mA/ mA mA/ mA mA % V mA mA Test Conditions Pin Symbol Min. Typ. Max. Unit
Data Sheet
Type*
A A C A A A A A C C C C C C
Output off current 3
14
IOFF3
5
mA
C
IOUT supply sensitivity, write mode
14
VSEW
6
%/V
C
IOUT current output noise
14
INOO
3
nA/rtHz
C
*A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note 1: Linearity of the amplifier is calculated using a best fit method at three operating points of IOUT at 20 mA, 40 mA, and 60 mA. IOUT = (IIN x GAIN) + I OS
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Zarlink Semiconductor Inc.
ZL40518
specified.
Data Sheet
Electrical Characteristics: AC Performance - Vcc = 5 V, Iout = 40 mA DC with 40 mA pulse, Tamb = 25C, unless otherwise Parameters
Output AC Performance
Test Conditions
Pin.
Symbol
Min.
Typ.
Max.
Unit
Type*
Write rise time Write fall time Output current overshoot IOUT ON propagation delay IOUT OFF propagation delay Disable time
IOUT = 40 mA (read) + 40 mA (10 to 90%)1 IOUT = 40 mA (read) + 40 mA (10 to 90%)1 IOUT = 40 mA (read) + 40 mA1 /EN 50% High-Low to IOUT at 50% of final value /EN 50% Low-High to IOUT at 50% of final value PWR_UP 50% High-Low to Iout at 50% of final value PWR_UP 50% Low-High to Iout at 50% of final value IOUT = 50 mA, all channels, -3 dB value
14 14 14 14 14 14
tRISE tFALL OS tON tOFF tDIS
1.0 1.1 5 2.2 2.0 20
ns ns % ns ns ns
C C C C C C
Enable time
14
tEN
23
ns
C
Amplifier bandwidth Oscillator Oscillator frequency Osc. Temperature coefficient Disable time oscillator Enable time oscillator
14
BWLCA
28
MHz
C
RF = 7.5 k RF = 7.5 k OSCEN 50% High-Low to IOUT at 50% of final value OSCEN 50% Low-High to IOUT at 50% of final value
14 14 14 14
FOSC TCOSC TDISO TENO
288
322 +150 4 2
352
MHz ppm/ C ns ns
A C C C
* A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note 1: Load resistor at IOUT 6.8 ohms, measurement with 50 ohm oscilloscope and 39 ohm series resistor.
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ZL40518
Characteristic Curves
Data Sheet
800
700
Frequency (MHz)
600
500
400
300
200 2 .0 0 3 .0 0 4 .0 0 5 .0 0 6 .0 0 7 .0 0 R F (k O h m ) 8 .0 0 9 .0 0 1 0 .0 0 1 1 .0 0 1 2 .0 0
Figure 6 - Oscillator Frequency vs RF (RS=7.5 k) Vcc = 5 V, Temp = 25C
120
100
Amplitude (mApk-pk)
80
60
40
20
0 2 3 4 5 6 RS (kOhm s) 7 8 9 10
Figure 7 - Oscillator Swing vs RS (RF=7.5 ) Vcc = 5 V, Temp = 25C
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Zarlink Semiconductor Inc.
ZL40518
60
Data Sheet
50
40 Amplitude (mApk-pk)
30
20
10
0 200
250
300
350 Frequency (MHz)
400
450
500
Figure 8 - Oscillator Frequency Dependency of Swing Vcc = 5 V, Temp = 25C
500
400
Iout (mA)
300
200
100
0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Input Current (uA)
Figure 9 - Transfer Characteristic of Channel 2 (Gain = 278, Load Resistor at IOUT = 6.8 )
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Zarlink Semiconductor Inc.
ZL40518
Data Sheet
0.4
0.35
0.3
0.25 Iout (A) 0.2
0.15
0.1
0.05 0 0 1 2 3 V o u t (V ) 4 5 6
Figure 10 - Voltage Compliance R (IOUT to VCC) = 2.0
Figure 11 - Step Response, Read Channel: 50 mA, Channel 2: 50mApp
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Zarlink Semiconductor Inc.
ZL40518
Data Sheet
Figure 12 - Step Response, Read Channel: 50 mA, Channel 2: 250mApp
Timing Waveforms
PWR_UP
/ENR
/EN2
/EN3
t EN
t ON tR
t ON tR
t OFF t OFF tR tR t DIS
Figure 13 - Output Waveform Showing Addition of Read and Write Levels
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Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively "Zarlink") is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink's conditions of sale which are available on request.
Purchase of Zarlink's I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved.
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